1. Field of the Invention
The present invention relates to a test system with rotational test arms for testing semiconductor components; in particular, the present invention relates to a test system testing semiconductor components by test arms moving the semiconductor components rotationally to two test sockets.
2. Description of Related Art
The production of integrated circuit (IC) generally includes IC design and wafer manufacture of the initial period, wafer electrical test of the middle period, final test of the last period, and delivery of goods. For the requirement of minimizing the semiconductor devices, every stage of the IC manufacturing process plays the same important role. Among them, the electrical test can check every electrical parameter of the semiconductor components to ensure that the product works properly; the reality test utilizes the test system equipment to simulate the work environment of the different product on the public-board by loading different test program or with different customized test equipment, for checking if the semiconductor component can perform the required specifications.
Currently semiconductor tester has many innovative designs on the rear test stage. For example, automatic system function tester (ASFT) can provide several sets of PCB level parallel test for production, compatible to the different package types of QFP, TQFP, μBGA, PGA, and CSP, through the design of multi-bit test ports, multiple transport devices and other mechanisms, for increasing the throughput of production test.
Furthermore, if the different test signals are performed in the same test socket, the test socket requires a complex circuit and program design, and the test time for each device under test (DUT) is long. The test time corresponds to the cost, and the cost of every DUT is calculated in units of test time, so every manufacturer wants to make effort to save test time and design better test process. However, the most direct way is the adoption of a simple and high production machine.
Please refer to FIG. 1, showing a block diagram of a tester for DUT according to the prior art. The tester is illustrated by two test sites, and each test site has a transport device, a test arm, a test socket, and a test board. The first test site 11 has the first transport device 111, the first test arm 112, the first test socket 113, and the first test board 1131. The second test site 12 has the second transport device 121, the second test arm 122, the second test socket 123, and the second test board 1231.
The test process is illustrated by the first test site 11 for example. The transport device 111 carries the DUT to the first test socket 113; then the first test arm 112 moves down and presses the DUT to start testing. The test time is determined by the test program, and each of the test sites is the same. After completing the test, the DUT is carried from the first test site 113 to the transport device 111 for classifying. Therefore, for four test sites, the tester requires four test arms and at least one moving arm for classifying; even if the test arm can move the DUT and replace the moving arm, the driving mechanism of the test arms will become complex.
According to mentioned above, some testers in the testing process repeatedly moving and caused a lot of wasted time waiting. If the moving time can be saved while retaining the flexibility of the machine, and consider optimizing the testing process according to the DUT, the throughput of testing semiconductor components will be improved.